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vishay siliconix dg411l, dg412l, dg413l document number: 71397 s11-0179-rev. f, 07-feb-11 www.vishay.com 1 precision monolithic quad spst low-voltage cmos analog switches features ? 2.7- thru 12 v single supply or 3- thru 6 dual supply ? on-resistance - r ds(on) : 17 ? ? fast switching - t on : 19 ns ?t off : 12 ns ? ttl, cmos compatible ? low leakage: 0.25 na ? 2000 v esd protection benefits ? widest dynamic range ? low signal errors and distortion ? break-before-make switching action ? simple interfacinge applications ? precision automatic test equipment ? precision data acquisition ? communication systems ? battery powered systems ? computer peripherals ?sdsl, dslam ? audio and video signal routing description the dg411l, dg412l, dg413l are low voltage pin-for-pin compatible companion devices to the industry standard dg411, dg412, dg413 wi th improved performance. using bicmos wafer fabrication technology allows the dg411l, dg412l, dg413l to operate on single and dual supplies. single supply voltage ranges from 3 to 12 v while dual supply operation is recommended with 3 to 6 v. combining high speed (t on : 19 ns), flat r ds(on) over the analog signal range (5 ? ), minimal insertion lose (- 3 db at 280 mhz), and excellent crosstalk and off-isolation performance (- 50 db at 50 mhz), the dg411l, dg412l, dg413l are ideally suited for audio and video signal switching. the dg411l and dg412l respond to opposite control logic as shown in the truth table. the dg413l has two normally open and two normally closed switches. functional block diagram and pin configuration logic ?0? ? 0.8 v logic ?1? ? 2.4 v logic ?0? ? 0.8 v logic ?1? ? 2.4 v * pb containing terminations are not rohs compliant, exemptions may apply truth table logic dg411l dg412l 0onoff 1offon 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 top view in 1 in 2 d 1 d 2 s 1 s 2 v- v+ gnd v l s 4 s 3 d 4 d 3 in 4 in 3 dual-in-line, tssop and soic dg411l, dg412l truth table logic sw 1 , sw 4 sw 2 , sw 3 0offon 1onoff 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 top view in 1 in 2 d 1 d 2 s 1 s 2 v- v+ gnd v l s 4 s 3 d 4 d 3 in 4 in 3 dg413l dual-in-line, tssop and soic a v aila b le rohs* compliant
www.vishay.com 2 document number: 71397 s11-0179-rev. f, 07-feb-11 vishay siliconix dg411l, dg412l, dg413l notes: a. signals on s x , d x , or in x exceeding v+ or v- will be clamped by internal diodes . limit forward diode current to maximum current ratings. b. all leads welded or soldered to pc board. c. derate 7 mw/c above 75 c d. derate 7.6 mw/c above 75 c e. derate 12 mw/c above 75 c. ordering information temp. range package part number dg411l, dg412l - 40 c to 85 c 16-pin narrow soic dg411ldy dg411ldy-e3 dg411ldy-t1 dg411ldy-t1-e3 dg412ldy dg412ldy-e3 dg412ldy-t1 dg412ldy-t1-e3 16-pin tssop dg411ldq dg411ldq-e3 dg411ldq-t1 DG411LDQ-T1-E3 dg412ldq dg412ldq-e3 dg412ldq-t1 dg412ldq-t1-e3 dg413l - 40 c to 85 c 16-pin narrow soic dg413ldy dg413ldy-e3 dg413ldy-t1 dg413ldy-t1-e3 16-pin tssop dg413ldq dg413ldq-e3 dg413ldq-t1 dg413ldq-t1-e3 absolute maximum ratings parameter limit unit v+ to v- - 0.3 to 13 v gnd to v- 7 v l (gnd - 0.3) to (v+) + 0.3 i n a , v s , v d - 0.3 to (v+) + 0.3 or 30 ma, whichever occurs first continuous current (any terminal) 30 ma peak current, s or d (pulsed 1 ms, 10 % duty cycle) 100 storage temperature (dq, dy suffix) - 65 to 125 c (ak suffix) - 65 to 150 power dissipation (packages) b 16-pin tssop c 450 mw 16-pin soic d 650 16-pin cerdip e 900
document number: 71397 s11-0179-rev. f, 07-feb-11 www.vishay.com 3 vishay siliconix dg411l, dg412l, dg413l notes: a. refer to process option flowchart. b. room = 25 c, full = as determined by the operating temperature suffix. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a minimum and the most pos itive a maximum, is used in this data sheet. e. guaranteed by design, no t subject to production test. f. v in = input voltage to perform proper function. g. leakage parameters are guaranteed by worst case test conditions and not subject to test. specifications a (single supply 12 v) parameter symbol test conditions unless otherwise specified v+ = 12 v, v- = 0 v v l = 5 v, v in = 2.4 v, 0.8 v f temp. b typ. c a suffix limits - 55 c to 125 c d suffix limits - 40 c to 85 c unit min. d max. d min. d max. d analog switch analog signal range e v analog full 012012v drain-source on-resistance r ds(on) v+ = 10.8 v, v- = 0 v i s = 10 ma, v d = 2/9 v room full 20 30 45 30 40 ? switch off leakage current i s(off) v d = 1/11 v, v s = 11/1 v room full - 1 - 15 1 15 - 1 - 10 1 10 na i d(off) room full - 1 - 15 1 15 - 1 - 10 1 10 channel on leakage current i d(on) v s = v d = 11/1 v room full - 1 - 15 1 15 - 1 - 10 1 10 digital control input current, v in low i il v in under test = 0.8 v full 0.01 - 1.5 1.5 - 1 1 a input current, v in high i ih v in under test = 2.4 v full - 1.5 1.5 - 1 1 dynamic characteristics tu r n - o n t i m e t on r l = 300 ? , c l = 35 pf v s = 5 v, see figure 2 room full 20 50 70 50 60 ns turn-off time t off room full 12 30 48 30 40 break-before-make time delay t d dg413l only, v s = 5 v r l = 300 ? , c l = 35 pf room 6 charge injection e qv g = 0 v, r g = 0 ? , c l = 10 nf room 5 pc off-isolation e oirr r l = 50 ? , c l = 5 pf , f = 1 mhz room 71 db channel-to-channel crosstalk e x ta l k room 95 source off capacitance e c s(off) f = 1 mhz room 5 pf drain off capacitance e c d(off) room 6 channel-on capacitance e c d(on) room 15 power supplies positive supply current i+ v in = 0 or 5 v room full 0.02 1 7.5 1 5 a negative supply current i- room full - 0.002 - 1 - 7.5 - 1 - 5 logic supply current i l room full 0.002 1 7.5 1 5 ground current i gnd room full - 0.002 - 1 - 7.5 - 1 - 5
www.vishay.com 4 document number: 71397 s11-0179-rev. f, 07-feb-11 vishay siliconix dg411l, dg412l, dg413l notes: a. refer to process option flowchart. b. room = 25 c, full = as determin ed by the operating temperature suffix. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a minimum and the most pos itive a maximum, is used in this data sheet. e. guaranteed by design, not subject to production test. f. v in = input voltage to perform proper function. g. leakage parameters are guaranteed by worst ca se test conditions and not subject to test. specifications a (dual supply 5 v) parameter symbol test conditions unless otherwise specified v+ = 5 v, v- = - 5 v v l = 5 v, v in = 2.4 v, 0.8 v f temp. b ty.p c a suffix limits - 55 c to 125 c d suffix limits - 40 c to 85 c unit min. d max. d min. d max. d analog switch analog signal range e v analog full - 5 5 - 5 5 v drain-source on-resistance r ds(on) v+ = 5 v, v- = - 5 v i s = 10 ma, v d = 3.5 v room full 20 33 45 33 40 ? switch off leakage current g i s(off) v+ = 5.5 , v- = - 5.5 v v d = 4.5 v, v s = 4.5 v room full - 1 - 15 1 15 - 1 - 10 1 10 na i d(off) room full - 1 - 15 1 15 - 1 - 10 1 10 channel on leakage current g i d(on) v+ = 5.5 v, v- = - 5.5 v v s = v d = 4.5 v room full - 1 - 15 1 15 - 1 - 10 1 10 digital control input current, v in low e i il v in under test = 0.8 v full 0.05 - 1.5 1.5 - 1 1 a input current, v in high e i ih v in under test = 2.4 v full 0.05 - 1.5 1.5 - 1 1 dynamic characteristics tu r n - o n t i m e e t on r l = 300 ? , c l = 35 pf v s = 3.5 v, see figure 2 room full 21 50 70 50 60 ns turn-off time e t off room full 16 35 50 35 40 break-before-make time delay e t d dg413l only, v s = 3.5 v r l = 300 ? , c l = 35 pf room 6 charge injection e qv g = 0 v, r g = 0 ? , c l = 10 nf room 5 pc off isolation e oirr r l = 50 ? , c l = 5 pf , f = 1 mhz room 68 db channel-to-channel crosstalk e x ta l k room 85 source off capacitance e c s(off) f = 1 mhz room 9 pf drain off capacitance e c d(off) room 9 channel on capacitance e c d(on) room 20 power supplies positive supply current e i+ v in = 0 or 5 v room full 0.03 1 7.5 1 5 a negative supply current e i- room full - 0.002 - 1 - 7.5 - 1 - 5 logic supply current e i l room full 0.002 1 7.5 1 5 ground current e i gnd room full - 0.002 - 1 - 7.5 - 1 - 5
document number: 71397 s11-0179-rev. f, 07-feb-11 www.vishay.com 5 vishay siliconix dg411l, dg412l, dg413l notes: a. refer to process option flowchart. b. room = 25 c, full = as determined by the operating temperature suffix. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a minimum and the most pos itive a maximum, is used in this data sheet. e. guaranteed by design, no t subject to production test. f. v in = input voltage to perform proper function. g. leakage parameters are guaranteed by worst case test conditions and not subject to test. specifications a (single supply 5 v) parameter symbol test conditions unless otherwise specified v+ = 5 v, v- = 0 v v l = 5 v, v in = 2.4 v, 0.8 v f temp. b typ. c a suffix limits - 55 c to 125 c d suffix limits - 40 c to 85 c unit min. d max. d min. d max. d analog switch analog signal range e v analog full 5 5 v drain-source on-resistance e r ds(on) v+ = 4.5 v i s = 5 ma, v d = 1 v, 3.5 v room full 35 50 88 50 75 ? dynamic characteristics tu r n - o n t i m e e t on r l = 300 ? , c l = 35 pf v s = 3.5 v, see figure 2 room hot 27 50 90 50 60 ns turn-off time e t off room hot 15 30 55 30 40 break-before-make time delay e t d dg413l only, v s = 3.5 v r l = 300 ? , c l = 35 pf room 6 charge injection e qv g = 0 v, r g = 0 ? , c l = 10 nf room 0.5 pc power supplies positive supply current e i+ v in = 0 or 5 v room hot 0.02 1 7.5 1 5 a negative supply current e i- room hot - 0.002 - 1 - 7.5 - 1 - 5 logic supply current e i l room hot 0.002 1 7.5 1 5 ground current e i gnd room hot - 0.002 - 1 - 7.5 - 1 - 5
www.vishay.com 6 document number: 71397 s11-0179-rev. f, 07-feb-11 vishay siliconix dg411l, dg412l, dg413l notes: a. refer to process option flowchart. b. room = 25 c, full = as determin ed by the operating temperature suffix. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a minimum and the most pos itive a maximum, is used in this data sheet. e. guaranteed by design, not subject to production test. f. v in = input voltage to perform proper function. g. leakage parameters are guaranteed by worst ca se test conditions and not subject to test. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. specifications a (single supply 3 v) parameter symbol test conditions unless otherwise specified v+ = 3 v, v- = 0 v v l = 3 v, v in = 0.4 v f temp. b typ. c a suffix limits - 55 c to 125 c d suffix limits - 40 c to 85 c unit min. d max. d min. d max. d analog switch analog signal range e v analog full 0303v drain-source on-resistance r ds(on) v+ = 2.7 v, v- = 0 v i s = 5 ma, v d = 0.5, 2.2 v room full 65 80 115 80 100 ? switch off leakage current g i s(off) v+ = 3.3 , v- = 0 v v d = 1, 2 v, v s = 2, 1 v room full - 1 - 15 1 15 - 1 - 10 1 10 na i d(off) room full - 1 - 15 1 15 - 1 - 10 1 10 channel on leakage current g i d(on) v+ = 3.3 v, v- = 0 v v s = v d = 1, 2 v room full - 1 - 15 1 15 - 1 - 10 1 10 digital control input current, v in low i il v in under test = 0.4 v full 0.005 - 1.5 1.5 - 1 1 a input current, v in high i ih v in under test = 2.4 v full 0.005 - 1.5 1.5 - 1 1 dynamic characteristics tu r n - o n t i m e t on r l = 300 ? , c l = 35 pf v s = 1.5 v, see figure 2 room full 50 85 150 85 110 ns turn-off time t off room full 30 60 100 60 85 break-before-make time delay t d dg413l only, v s = 1.5 v r l = 300 ? , c l = 35 pf room 6 charge injection e qv g = 0 v, r g = 0 ? , c l = 10 nf room 1 pc off isolation e oirr r l = 50 ? , c l = 5 pf , f = 1 mhz room 68 db channel-to-channel crosstalk e x ta l k room 85 source off capacitance e c s(off) f = 1 mhz room 6 pf drain off capacitance e c d(off) room 6 channel on capacitance e c d(on) room 20
document number: 71397 s11-0179-rev. f, 07-feb-11 www.vishay.com 7 vishay siliconix dg411l, dg412l, dg413l typical characteristics (25 c, unless otherwise noted) r ds(on) vs. drain voltage (single supply) r ds(on) vs. drain voltage and temperature (dual supply) leakage current vs. analog voltage (dual supply) 0 20 40 60 80 100 036912 v cc = 2.7 v drain voltage (v) - on-resistance ( ? ) r ds(on) v cc = 4.5 v v cc = 12 v 0 7 14 21 28 35 - 5- 3- 1 1 3 5 - on-resistance ( ) r ds(on) drain voltage (v) v = 5 v a = 125 c b = 85 c c = 25 c d = - 40 c e = - 55 c - 30 - 20 - 10 0 10 20 30 - 5- 3- 1 1 3 5 v d or v s - drain-source voltage leakage current (pa) i , i sd v+ = 5 v v- = - 5 v i d(on) i d(off) i s(off) r ds(on) vs. drain voltage and temperature (single supply) supply current vs. temperature switching time vs. single supply b drain voltage (v) - on-resistance ( ) r ds(on) a d 0 10 20 30 40 50 012345 c e a = 125 c b = 85 c c = 25 c d = - 40 c e = - 55 c v+ = 5 v v- = 0 v 0.00 0.05 0.10 0.15 0.20 0.25 0.30 - 50 - 25 0 25 50 75 100 125 150 temperature (c) supply current (na) v+ = 5 v v- = 0 v 0 10 20 30 40 50 03691215 v+ - positive supply voltage (v) switching speed (ns) t on t off
www.vishay.com 8 document number: 71397 s11-0179-rev. f, 07-feb-11 vishay siliconix dg411l, dg412l, dg413l typical characteristics (25 c, unless otherwise noted) switching time vs. dual supply input threshold vs. single supply voltage capacitance vs. analog signal (dual supply) 0 9 18 27 36 45 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 v positive supply voltage (v) switching speed (ns) t on t off 0.0 0.3 0.6 0.9 1.2 1.5 1.8 02468101214 v positive supply voltage (v) - threshold (v) th v 0 5 10 15 20 25 - 5- 3- 1 1 3 5 analog voltage (v) capacitance (pf) v supply = 5 v c d(on) c s /c d(off) charge injection vs. drain voltage drain capacitance vs. drain voltage (single supply) insertion loss, off isolation and crosstalk vs. frequency (single supply) - 2 0 2 4 6 - 5 - 3 - 1 1 3 5 drain voltage (v) v supply = 5 v charge injection (q) v supply = 3 v 0 1 2 3 4 5 6 7 036912 v d - drain voltage (v) capacitance (pf) c d(off) at v cc = 5 v c d(off) at v cc = 3 v c d(off) at v cc = 12 v 0.1 - 110 1 - 30 10 - 70 - 50 100 1000 frequency (mhz) - 90 loss (db) v+ = 3 v v- = 0 v r l = 50 off isolation crosstalk insertion loss - 3 db = 280 mhz 10 - 10
document number: 71397 s11-0179-rev. f, 07-feb-11 www.vishay.com 9 vishay siliconix dg411l, dg412l, dg413l schematic diagram (typical channel) test circuits figure 1. level shift/ drive v in v l s v+ gnd v- d v- v+ figure 2. switching time 0 v logic input switch input* switch output 3 v 50% 0 v switch input* v s t r < 20 ns t f < 20 ns 90 % - v s t on t on v o 90 % v o note: logic input waveform is inverted for switches that have the opposite logic sense control c l (includes fixture and stray capacitance) v+ in r l r l + r ds(on) v o = v s s d v- v o gnd v l c l 35 pf v- r l 300 v l v+ v s figure 3. break-before-make (dg413l) 0 v logic input switch switch output 3 v 50 % 0 v output 0 v 90 % v o2 v o1 90 % v s1 v s2 t d t d v o2 c l (includes fixture and stray capacitance) v+ s 2 v- s 1 v l v s2 in 2 d 2 v s1 r l2 300 d 1 v o1 c l2 35 pf gnd r l1 300 c l1 35 pf in 1 v-
www.vishay.com 10 document number: 71397 s11-0179-rev. f, 07-feb-11 vishay siliconix dg411l, dg412l, dg413l test circuits vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?71397 . figure 4. charge injection c l 10 nf d r g v o v+ s v- 3 v in v l v g gnd off on off off on off v o v o in x in x q = v o x c l in x dependent on switch configuration input polarity determined by sense of switch. v- v+ v l figure 5. crosstalk 0 v , 2.4 v s 1 x talk isolation = 20 log v s v o d 2 c = rf bypass r l d 1 s 2 v s 0 v, 2.4 v in 1 50 v o in 2 r g = 50 v l v+ gnd v - nc c cc v+ v- v l figure 6. off-isolation r l 50 d 0 v, 2.4 v v+ r g = 50 gnd v- c v s off isolation = 20 log v s v o in v l v o c s c c = rf bypass v- v+ v l figure 7. source/drain capacitances d in s v l v+ gnd v - c 0 v, 2.4 v meter hp4192a impedance analyzer or equivalent cc v lv+ v-
all leads 0.101 mm 0.004 in e h c d e b a1 l 4 3 12 8 7 56 13 14 16 15 9 10 12 11 package information vishay siliconix document number: 71194 02-jul-01 www.vishay.com 1
jedec part number: ms-012 dim min max min max a 1.35 1.75 0.053 0.069 a 1 0.10 0.20 0.004 0.008 b 0.38 0.51 0.015 0.020 c 0.18 0.23 0.007 0.009 d 9.80 10.00 0.385 0.393 e 3.80 4.00 0.149 0.157 e 1.27 bsc 0.050 bsc h 5.80 6.20 0.228 0.244 l 0.50 0.93 0.020 0.037 0 8 0 8 ecn: s-03946?rev. f, 09-jul-01 dwg: 5300
vishay siliconix package information document number: 74417 23-oct-06 www.vishay.com 1 symbols dimensions in millimeters min nom max a - 1.10 1.20 a1 0.05 0.10 0.15 a2 - 1.00 1.05 b 0.22 0.28 0.38 c - 0.127 - d 4.90 5.00 5.10 e 6.10 6.40 6.70 e1 4.30 4.40 4.50 e-0.65- l 0.50 0.60 0.70 l1 0.90 1.00 1.10 y--0.10 1036 ecn: s-61920-rev. d, 23-oct-06 dwg: 5624 tssop: 16-lead
application note 826 vishay siliconix www.vishay.com document number: 72608 24 revision: 21-jan-08 application note recommended minimum pads for so-16 recommended minimum pads for so-16 0.246 (6.248) recommended mi nimum pads dimensions in inches/(mm) 0.152 (3.861) 0.047 (1.194) 0.028 (0.711) 0.050 (1.270) 0.022 (0.559) 0.372 (9.449) return to index return to index
document number: 91 000 www.vishay.com revision: 11-mar-11 1 disclaimer legal disclaimer notice vishay all product, product specifications and data ar e subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicab le law, vishay disc laims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, incl uding without limitation specia l, consequential or incidental dama ges, and (iii) any and all impl ied warranties, including warran ties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of pro ducts for certain types of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in gene ric applications. such statements are not binding statements about the suitability of products for a partic ular application. it is the customers responsibility to validate that a particu lar product with the properties described in th e product specification is su itable for use in a particul ar application. parameters provided in datasheets an d/or specifications may vary in different applications and perfo rmance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product co uld result in person al injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk and agr ee to fully indemnify and hold vishay and it s distributors harmless from and against an y and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that vis hay or its distributor was negligent regarding the design or manufact ure of the part. please contact authorized vishay personnel t o obtain written terms and conditions regarding products designed fo r such applications. no license, express or implied, by estoppel or otherwise, to any intelle ctual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.

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